july 1996 nds8858h complementary mosfet half bridge general description features ________________________________________________________________________________ absolute maximum ratings t a = 25c unless otherwise noted symbol parameter n-channel p-channel units v dss drain-source voltage 30 -30 v v gss gate-source voltage 20 -20 v i d drain current - continuous (note 1a &2) 6.3 -4.8 a - pulsed 20 20 p d maximum power dissipation (note 1a) 2.5 w (single device) (note 1b) 1.2 (note 1c) 1 t j ,t stg operating and storage temperature range -55 to 150 c thermal characteristics r q ja thermal resistance, junction-to-ambient (single device) (note 1a) 50 c/w r q jc thermal resistance, junction-to-case (single device) (note 1a) 25 c/w nds8858h rev. c these complementary mosfet half bridge devices are produced using fairchild's proprietary, high cell density, dmos technology. this very high density process is especially tailored to minimize on-state resistance, provide superior switching performance, and withstand high energy pulses in the avalanche and commutation modes. these devices are particularly suited for low voltage half bridge applications or cmos applications when both gates are connected together . n-channel 6.3a, 30v, r ds(on ) =0.035 w @ v gs =10v. p-channel - 4.8 a, -30 v, r ds(on ) = 0.065 w @ v gs =-10v. high density cell design or extremely low r ds(on) . high power and current handling capability in a widely used surface mount package. matched pair for equal input capacitance and power capability . p-gate vout vout vout vout v- v+ n-gate ? 1997 fairchild semiconductor corporation
electrical characteristics (t a = 25c unless otherwise noted) symbol parameter conditions type min typ max units off characteristics bv dss drain-source breakdown voltage v gs = 0 v, i d = 250 a n-ch 30 v v gs = 0 v, i d = - 250 a p-ch -30 v i dss zero gate voltage drain current v ds = 24 v, v gs = 0 v n-ch 1 a t j = 55c 10 a v ds = -24 v, v gs = 0 v p-ch -1 a t j = 55c -10 a i gssf gate - body leakage, forward v gs = 20 v, v ds = 0 v all 100 na i gssr gate - body leakage, reverse v gs = -20 v, v ds = 0 v all -100 na on characteristics (note 3 ) v gs (th) gate threshold voltage v ds = v gs , i d = 250 a n-ch 1 1.6 2.8 v t j = 125c 0.7 1.2 2.2 v ds = v gs , i d = -250 a p-ch -1 -1.6 -2.8 t j = 125c -0.7 -1.2 -2.2 r ds(on) static drain-source on-resistance v gs = 10 v, i d = 4.8 a n-ch 0.033 0.035 w t j = 125c 0.046 0.063 v gs = 4.5 v, i d = 3.7 a 0.046 0.05 v gs = -10 v, i d = -4.8 a p-ch 0.052 0.065 t j = 125c 0.075 0.13 v gs = -4.5 v, i d = -3.7 a 0.085 0.1 i d (on) on-state drain current v gs = 10 v, v ds = 5 v n-ch 20 a v gs = -10 v, v ds = -5 v p-ch -20 g fs forward transconductance v ds = 10 v, i d = 4.8 a n-ch 10 s v ds = -10 v, i d = -4.8 a p-ch 7 dynamic characteristics c iss input capacitance n-channel v ds = 15 v, v gs = 0 v, f = 1.0 mhz p-channel v ds = -15 v, v gs = 0 v, f = 1.0 mhz n-ch 720 pf p-ch 690 c oss output capacitance n-ch 370 pf p-ch 430 c rss reverse transfer capacitance n-ch 250 pf p-ch 160 nds8858h rev. c
electrical characteristics (t a = 25c unless otherwise noted) symbol parameter conditions type min typ max units switching characteristics (note 2 ) t d(on) turn - on delay time n-channel v dd = 10 v, i d = 1 a, v gen = 1 0 v, r gen = 6 w p -channel v dd = -10 v, i d = -1 a, v gen = -10 v, r gen = 6 w n-ch 12 20 ns p-ch 9 20 t r turn - on rise time n-ch 13 30 ns p-ch 20 25 t d(off) turn - off delay time n-ch 29 50 ns p-ch 40 50 t f turn - off fall time n-ch 10 20 ns p-ch 19 40 q g total gate charge n-channel v ds = 10 v, i d = 4.8 a, v gs = 10 v p -channel v ds = -10 v, i d = -4.8 a, v gs = -10 v n-ch 19 30 nc p-ch 21 30 q gs gate-source charge n-ch 2.1 nc p-ch 3.2 q gd gate-drain charge n-ch 5.2 nc p-ch 5.2 drain-source diode characteristics and maximum ratings i s maximum continuous drain-source diode forward current n-ch 2 a p-ch -2 v sd drain-source diode forward voltage v gs = 0 v, i s = 2.0 a (note 2 ) n-ch 0.9 1.2 v v gs = 0 v, i s = -2.0 a (note 2 ) p-ch -0.85 -1.2 t rr reverse recovery time n-channel v gs = 0 v, i f = 2.0 a, di f /dt = 100 a/s n-ch 100 ns p-channel v gs = 0 v, i f = -2.0 a, di f /dt = 100 a/s p-ch 100 notes: 1 . r q ja is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the so lder mounting surface of the drain pins. r q jc is guaranteed by design while r q ca is determined by the user's board design. p d ( t ) = t j - t a r q j a ( t ) = t j - t a r q j c + r q c a ( t ) = i d 2 ( t ) r d s ( o n ) t j typical r q ja using the board layouts shown below on 4.5"x5" fr-4 pcb in a still air environment : a. 50 o c/w when mounted on a 1 in 2 pad of 2oz copper. b. 105 o c/w when mounted on a 0.04 in 2 pad of 2oz copper. c. 125 o c/w when mounted on a 0.006 in 2 pad of 2oz copper. scale 1 : 1 on letter size paper 2. pulse test: pulse width < 300 s, duty cycle < 2.0%. nds8858h rev. c 1a 1b 1c
nds8858h rev. c 0 0.5 1 1.5 2 2.5 3 0 5 10 15 20 25 v , drain-source voltage (v) i , drain-source current (a) ds d v =10v gs 6.0 4.0 3.5 3.0 5.0 4.5 0 5 10 15 20 25 0.5 1 1.5 2 2.5 3 i , drain current (a) drain-source on-resistance r , normalized ds(on) v = 3.0v gs d 4.0 10 6.0 4.5 5.0 3.5 -50 -25 0 25 50 75 100 125 150 0.6 0.8 1 1.2 1.4 1.6 t , junction temperature (c) drain-source on-resistance j v = -10v gs i = -4.8a d r , normalized ds(on) -4 -3 -2 -1 0 -20 -15 -10 -5 0 v , drain-source voltage (v) i , drain-source current (a) v = -10v gs ds d -4.0 -6.0 -5.0 -3.5 -3.0 -4.5 -20 -16 -12 -8 -4 0 0.5 1 1.5 2 2.5 3 i , drain current (a) drain-source on-resistance d r , normalized ds(on) v = -3.5v gs -10 -5.0 -6.0 - 4.0 -4.5 typical electrical characteristics figure 1. n-channel on-region characteristics. figure 2. p-channel on-region characteristics . figure 3. n-channel on-resistance variation with gate voltage and drain current. figure 4. p-channel on-resistance variation with gate voltage and drain current. figure 5. n-channel on-resistance variation with temperature. figure 6. p-channel on-resistance variation with temperature. -50 -25 0 25 50 75 100 125 150 0.6 0.8 1 1.2 1.4 1.6 t , junction temperature (c) drain-source on-resistance j v =10v gs i = 4.8a d r , normalized ds(on)
nds8858h rev. c 0 5 10 15 20 25 0.5 0.75 1 1.25 1.5 1.75 2 i , drain current (a) drain-source on-resistance d v = 10v gs t = 125c j 25c -55c r , normalized ds(on) -20 -16 -12 -8 -4 0 0.5 1 1.5 2 i , drain current (a) drain-source on-resistance d r , normalized ds(on) v = -10v gs t = 125c j 25c -55c -6 -5 -4 -3 -2 -1 -20 -15 -10 -5 0 v , gate to source voltage (v) i , drain current (a) v = -10v ds gs d t = -55c j 25c 125c 1 2 3 4 5 6 0 5 10 15 20 25 v , gate to source voltage (v) i , drain current (a) v = 10v ds gs d t = -55c j 25c 125c figure 7. n-channel on-resistance variation with drain current and temperature. figure 8. p-channel on-resistance variation with drain current and temperature . figure 9. n-channel transfer characteristics. figure 10. p-channel transfer characteristics. typical electrical characteristics -50 -25 0 25 50 75 100 125 150 0.6 0.7 0.8 0.9 1 1.1 1.2 t , junction temperature (c) gate-source threshold voltage j i = 250a d v = v ds gs v , normalized th figure 11. n-channel gate threshold variation with temperature. -50 -25 0 25 50 75 100 125 150 0.6 0.7 0.8 0.9 1 1.1 1.2 t , junction temperature (c) gate-source threshold voltage i = -250a d v = v ds gs j v , normalized th figure 12 . p -channel gate threshold variation with temperature.
nds8858h rev. c -50 -25 0 25 50 75 100 125 150 0.9 0.95 1 1.05 1.1 t , junction temperature (c) drain-source breakdown voltage i = 250a d bv , normalized dss j 0.1 0.2 0.5 1 2 5 10 20 30 100 200 500 1000 1500 2000 v , drain to source voltage (v) capacitance (pf) ds c iss f = 1 mhz v = 0v gs c oss c rss 0 5 10 15 20 25 0 2 4 6 8 10 q , gate charge (nc) -v , gate-source voltage (v) g gs i = -4.8a d v = -5v ds -10v -20v -50 -25 0 25 50 75 100 125 150 0.94 0.96 0.98 1 1.02 1.04 1.06 1.08 1.1 t , junction temperature (c) drain-source breakdown voltage i = -250a d bv , normalized dss j 0.1 0.2 0.5 1 2 5 10 30 100 200 300 500 1000 2000 -v , drain to source voltage (v) capacitance (pf) ds c iss f = 1 mhz v = 0v gs c oss c rss typical electrical characteristics figure 13 . n -channel breakdown voltage variation with temperature. figure 15 . n -channel capacitance characteristics. figure 17 . n-channel gate charge characteristics. 0 5 10 15 20 25 0 2 4 6 8 10 q , gate charge (nc) v , gate-source voltage (v) g gs i = 4.8a d v = 5v ds 10v 20v figure 14 . p -channel breakdown voltage variation with temperature. figure 18 . p -channel gate charge characteristics. figure 16 . p -channel capacitance characteristics.
nds8858h rev. c 0 5 10 15 20 25 0 4 8 12 16 20 i , drain current (a) g , transconductance (siemens) t = -55c j d fs v = 10v ds 125c 25c -20 -16 -12 -8 -4 0 0 3 6 9 12 i , drain current (a) g , transconductance (siemens) t = -55c j 25c d fs v = -10v ds 125c typical electrical and thermal characteristics figure 20 . p-channel transconductance variation with drain current and temperature. figure 19. n-channel transconductance variation with drain current and temperature. 0 0.2 0.4 0.6 0.8 1 0.5 1 1.5 2 2.5 2oz copper mounting pad area (in ) steady-state power dissipation (w) 2 1c 1b 1a 4.5"x5" fr-4 board t = 25 c still air a o figure 23. so-8 single device dc power dissipation versus copper mounting pad area . figure 21. n-channel body diode forward voltage variation with current and temperature . 0.2 0.4 0.6 0.8 1 1.2 1.4 0.001 0.01 0.1 1 5 10 20 v , body diode forward voltage (v) i , reverse drain current (a) t = 125c j 25c -55c v =0v gs sd s figure 22 . p-channel body diode forward voltage variation with current and temperature . 0 0.4 0.8 1.2 1.6 2 0.001 0.01 0.1 1 5 10 20 -v , body diode forward voltage (v) -i , reverse drain current (a) t = 125c j 25c -55c v = 0v gs sd s
nds8858h rev. c typical thermal characteristics 0.1 0.2 0.5 1 2 5 10 30 50 0.01 0.05 0.1 0.5 1 5 10 20 50 v , drain-source voltage (v) i , drain current (a) ds d 1s 100ms 10s 10ms rds(on) limit 1ms dc 100us v = 10v single pulse r = see note 1c t = 25c gs a q ja 0.1 0.2 0.5 1 2 5 10 30 50 0.01 0.05 0.1 0.5 1 5 10 20 50 - v , drain-source voltage (v) -i , drain current (a) ds d 1s 100ms 10s 10ms rds(on) limit 1ms dc 100us v = -10v single pulse r = see note 1c t = 25c gs a q ja figure 26. n-ch maximum safe operating area . figure 27 . p -ch maximum safe operating area . 0 0.2 0.4 0.6 0.8 1 2 3 4 5 6 7 2oz copper mounting pad area (in ) i , steady-state drain current (a) 2 1c 1b 1a 4.5"x5" fr-4 board t = 25 c still air v = 10v a o gs d 0 0.2 0.4 0.6 0.8 1 2 3 4 5 6 7 2oz copper mounting pad area (in ) -i , steady-state drain current (a) 2 1c 1b 1a 4.5"x5" fr-4 board t = 25 c still air v = -10v a o gs d figure 24 . n-ch maximum steady-state drain current versus copper mounting pad area. figure 25 . p -ch maximum steady-state drain current versus copper mounting pad area. 0.0001 0.001 0.01 0.1 1 10 100 300 0.001 0.002 0.005 0.01 0.02 0.05 0.1 0.2 0.5 1 t , time (sec) transient thermal resistance r(t), normalized effective 1 single pulse d = 0.5 0.1 0.05 0.02 0.01 0.2 duty cycle, d = t / t 1 2 r (t) = r(t) * r r = see note 1c q ja q ja q ja t - t = p * r (t) q ja a j p(pk) t 1 t 2 figure 28 . transient thermal response curve . note: thermal characterization performed using the conditions described in note 1c. transient thermal response will change depending on the circuit board design.
trademarks acex? coolfet? crossvolt? e 2 cmos tm fact? fact quiet series? fast ? fastr? gto? hisec? the following are registered and unregistered trademarks fairchild semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. life support policy fairchild?s products are not authorized for use as critical components in life support devices or systems without the express written approval of fairchild semiconductor corporation. as used herein: 1. life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, or (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in significant injury to the user. 2. a critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. product status definitions definition of terms datasheet identification product status definition advance information preliminary no identification needed obsolete this datasheet contains the design specifications for product development. specifications may change in any manner without notice. this datasheet contains preliminary data, and supplementary data will be published at a later date. fairchild semiconductor reserves the right to make changes at any time without notice in order to improve design. this datasheet contains final specifications. fairchild semiconductor reserves the right to make changes at any time without notice in order to improve design. this datasheet contains specifications on a product that has been discontinued by fairchild semiconductor. the datasheet is printed for reference information only. formative or in design first production full production not in production disclaimer fairchild semiconductor reserves the right to make changes without further notice to any products herein to improve reliability, function or design. fairchild does not assume any liability arising out of the application or use of any product or circuit described herein; neither does it convey any license under its patent rights, nor the rights of others. tinylogic? uhc? vcx? isoplanar? microwire? pop? powertrench? qfet? qs? quiet series? supersot?-3 supersot?-6 supersot?-8
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